Although the principles discussed in this paper are applicable to a wide range of power supply design, we only focus on the DC-DC converter here, because it is widely used. Almost every hardware engineer will be exposed to its related work, and maybe a power converter must be designed at any time. In this paper, we will consider two common tradeoffs related to low EMI design; Thermal performance, electromagnetic interference and scheme dimensions related to PCB layout and electromagnetic interference. In this paper, we will use a simple buck converter as an example, as shown in Figure 1.
Figure 1. Common buck converter
Measuring radiated and conducted EMI in the frequency domain is to expand the known waveform by Fourier series. In this paper, we focus on the performance of radiated EMI. In the synchronous buck converter, the main switching waveforms causing electromagnetic interference are generated by Q1 and Q2, that is, the current di / dt from the drain to the source of each FET in its respective conduction cycle. The current waveforms (Q and q2on) shown in Figure 2 are not very regular trapezoidal, but our operation freedom is greater. Because the transition of conductor current is relatively slow, formula 1 in Henry Ott's classic noise reduction technology in electronic systems can be applied. We found that for a similar waveform, its rise and fall time will directly affect the harmonic amplitude or Fourier coefficient (in).
Figure 2. Waveforms of Q1 and Q2
In=2IdSinï¼nÏdï¼/nÏd &TImes; Sinï¼nÏtr/Tï¼/nÏtr/T ï¼1ï¼
Where n is the harmonic level, t is the period, I is the peak current intensity of the waveform, D is the duty cycle, and TR is the minimum value of TR or TF.
In practical applications, it is very likely to encounter odd and even harmonic emissions at the same time. If only odd harmonics are generated, the duty cycle of the waveform must be accurate to 50%. In practice, there is little such duty cycle accuracy.
The electromagnetic interference amplitude of harmonic series is affected by the on-off of Q1 and Q2. This can be clearly seen when measuring the rise time TR and fall time TF of the drain source voltage VDS, or the current rise rate di / dt flowing through Q1 and Q2. This also means that we can simply reduce the EMI level by slowing down the on-off speed of Q1 or Q2. In fact, prolonging the switching time does have a great impact on harmonics with frequencies higher than f = 1 / Ï tr. However, a compromise must be made between increasing heat dissipation and reducing loss. Nevertheless, controlling these parameters is still a good method, which helps to achieve a balance between electromagnetic interference and thermal performance. Specifically, it can be realized by adding a small resistance (usually less than 5 Î©), which can be connected in series with the gates of Q1 and Q2 to control TR and TF. You can also connect a "turn off diode" in series with the gate resistance to independently control the transition time tr or TF (see Figure 3). This is actually an iterative process, and even the most experienced power designers use this method. Our ultimate goal is to reduce the electromagnetic interference to an acceptable level by slowing down the on-off speed of the transistor, while ensuring that its temperature is low enough to ensure stability.
Figure 3. Controlling the transition time with an associated diode
The physical loop area of switching nodes is also very important for controlling electromagnetic interference. Generally, for the consideration of PCB area, designers hope that the more compact the structure is, the better. However, many designers do not know which part of the layout has the greatest impact on electromagnetic interference. Back to the previous step-down regulator example, there are two loop nodes (as shown in Fig. 4 and Fig. 5), and their size will directly affect the electromagnetic interference level.
Figure 4. Buck regulator model 1
Figure 5. Buck regulator model 2
Ott's formula (2) on the electromagnetic interference level of different modes illustrates the direct linear influence of the loop area on the electromagnetic interference level of the circuit.
E=263&TImes; 10-16ï¼f2AIï¼ï¼1/rï¼ ï¼2ï¼
The radiation field is proportional to the following parameters: the harmonic frequency involved (F, unit Hz), the loop area (a, unit m2), the current (I) and the measurement distance (R, unit m).
This concept can be extended to all occasions of circuit design using trapezoidal waveform, but this paper only discusses power supply design. Referring to the AC model in Figure 4, study the loop current flow: the starting point is the input capacitor, then flows to Q1 during Q1 conduction, then enters the output capacitor through L1, and finally returns to the input capacitor.
When Q1 is off and Q2 is on, a second circuit is formed. Then, the energy stored in L1 flows through the output capacitor and Q2, as shown in Fig. 5. These loop area control is very important to reduce electromagnetic interference. The layout of devices should be considered in advance when PCB wiring. Of course, there are practical restrictions on how small the loop area can be.
It can be seen from formula 2 that reducing the loop area of switching nodes will effectively reduce the level of electromagnetic interference. If the loop area is reduced by 3 times, the electromagnetic interference will be reduced by 9.5db, and if it is reduced by 10 times, it will be reduced by 20 dB. In the design, it is best to minimize the loop area of the two loop nodes shown in Fig. 4 and Fig. 5, carefully consider the layout of the devices, and pay attention to the connection of copper wires. Try to avoid using both sides of PCB at the same time, because the through hole will significantly increase the inductance, which will lead to other problems.
The importance of properly placing high frequency input and output capacitors is often ignored. Several years ago, my company transferred our product design to foreign manufacturers. As a result, my job responsibilities have also changed greatly. I became a consultant to help novices in power design solve a series of trade-offs and many other problems mentioned in this article. Here is a design example of an off-line switch with an integrated ballast: the designer wants to reduce electromagnetic interference in the final power stage. I simply move the high-frequency output capacitor closer to the output stage, the loop area is only about half of the original, and the electromagnetic interference is reduced by about 6dB. The designer obviously didn't understand the truth. He called the capacitor a "magic hat". In fact, we just reduced the loop area of the switching node.
It is also important that the newly improved circuit may cause more serious problems than the original one. In other words, although extending the transition time can reduce electromagnetic interference, the thermal effect caused by it has become an important problem. One way to control electromagnetic interference is to replace the traditional DC to DC converter with a fully integrated power module. The power supply module is a switching regulator with a full set of success rate transistors and inductors. Like the linear regulator, it can be easily integrated into the system design. The loop area of the module switch node is much smaller than that of a voltage regulator or controller of similar size. The power module is not a new thing. It has been available for some time, but until now, due to a series of problems, the module still can not dissipate heat effectively, and can not be changed once installed.